SLAC Colloquium Series

SLAC Colloquium Series


Colloquium Detail

CMOS wafer post-processing

Date: 8/24/2010

Jurriaan Schmitz
MESA Institute of NanotechnologyIn this colloquium, first a general introduction will be given about CMOS wafer post-processing, as an approach to add functionality to CMOS microchips. The semiconductor industry is adjusting focus towards the so-called "More than Moore" innovation. By this is meant that microchip progress may not (or not only) follow from Moore's Law and its resulting dimensional scaling, but can also come from the addition of new components, new layers and new functions inside the microchip itself. Examples are the introduction of passive RF components, biosensors, and so-called 3D integration. This new innovation paradigm offers great opportunities for radiation imaging. Micromegas and GEM foils, directly fabricated on a chip, have shown excellent gaseous detector performance, with good energy resolution and precise alignment. Other research groups have pursued analogous fabrication approaches for solid-state radiation detection. Chip post-processing utilizes existing, well-developed methods and infrastructure. As such, precise and large-scale manufacturing of detectors may be much easier facilitated in the future. Detector performance results will be presented, for nuclear radiation, cosmics, beam tests, and UV photons (employing a CsI photocathode). An outlook of future detector R&D will be given.

Last update: October 03, 2013